ENHANCED STABILITY 12T SRAM DESIGN WITH 45NM TECHNOLOGY

Abstract

A Static Random-Access Memory is a type of semiconductor storage used to store every bit. It is referred to as volatile memory because it relies on a constant voltage supply to maintain the stored data. In contemporary digital systems, the SRAM cell serves as the primary memory device. Despite being speedier, SRAM cells have a high leakage current, which raises their power consumption. This proposed method addresses the half-select issue found in 6T and 7T SRAM cell. Extensive simulations are conducted using industry-standard Electronic Design Automation (EDA) tools to evaluate the performance, power, and area (PPA) metrics of the proposed design. The results show that the 12T SRAM cell achieves improved robustness and energy efficiency compared to traditional designs, making it suitable for modern applications in IoT devices, mobile computing, and artificial intelligence. By providing a practical and scalable look at to meeting the demands of future memory technologies and addressing the challenge in working in nanometer-scale technologies, this project promotes the field of VLSI design